Instead of deterministic testability in advance, random testability of a logic circuit can be analyzed using probability-based testability analysis. For example, given a random input pattern, one can calculate three measures for each signal s in a combinational circuit as follows:
- C0(s)—probability-based 0-controllability of s
- C1(s)—probability-based 1-controllability of s
- O(s)—probability-based observability of s
For each signal s in the
circuit, C0(s) + C1(s) = 1, so we can also determine C1(s) by 1 - C0(s).
C0 and C1 Calculation:
O Calculation:
For an example, if we want to determine the controllability and observability of a full adder circuit using the probability-based testability analysis method, it will look something like this,
0 Comments