Full Adder Using Two Half Adders Verilog Code | VLSI

Block Diagram of Full Adder:

To see the circuit of half-adder click here. 

Verilog Code:

module fulladder(A, B, Cin, S, Cout);
input A, B, Cin;
output S, Cout;

wire c1, c2, s1;

half_adder h1 (A, B, s1, c1);                //Calling my half_adder module and naming it h1
half_adder h2 (Cin, s1, S, c2);            //Calling my half_adder module and naming it h2

assign Cout = c1 | c2;
endmodule

See the half-adder Verilog code to understand better. 

See also: Half-adder