Eight Bit Adder | Verilog Code | VLSI

 Block Diagram of an Eight Bit Adder:



Here we will be making an eight  bit adder using 1 half-adder and 7 full-adder. This could also be made with all 8 full-adders. So what is the reason behind using 1 half-adder? We know, a full-adder requires three inputs, A, B and a previous state carry, Cint. So by using a half-adder we have generated that Cint and used it for the next full-adder and in this way we don't have to give an extra input.

Before understanding this code you must have a clear idea about the half-adder and full-adder modules, because in this code all that has been done is creating instances of those modules. 

Click here to read the full-adder post and to see the half-adder circuit and Verilog code, click here

Verilog Code:

module eightadder (A, B, sum, carry);
input [7:0] A;
input [7:0] B;
output [7:0] sum;
output carry;
wire [7:0] Cint;

half_adder a0 (                                                                        //created an instance of half_adder module
.S(sum[0]),
.C(Cint[0]),
.A(A[0]),
.B(B[0])
);
fulladder f1 (                                                                           //created an instance of fulladder module
.S(sum[1]),
.Cout(Cint[1]),
.A(A[1]),
.B(B[1]),
.Cin(Cint[0])
                                                                   //Cin is the previous adders carry
);
fulladder f2 (                                                                          //created an instance of fulladder module
.S(sum[2]),
.Cout(Cint[2]),
.A(A[2]),
.B(B[2]),
.Cin(Cint[1])
                                                                   //Cin is the previous adders carry
);
fulladder f3 (                                                                          //created an instance of fulladder module
.S(sum[3]),
.Cout(Cint[3]),
.A(A[3]),
.B(B[3]),
.Cin(Cint[2])
                                                                   //Cin is the previous adders carry
);
fulladder f4 (                                                                          //created an instance of fulladder module
.S(sum[4]),
.Cout(Cint[4]),
.A(A[4]),
.B(B[4]),
.Cin(Cint[3])
                                                                   //Cin is the previous adders carry
);
fulladder f5 (                                                                          //created an instance of fulladder module
.S(sum[5]),
.Cout(Cint[5]),
.A(A[5]),
.B(B[5]),
.Cin(Cint[4])
                                                                   //Cin is the previous adders carry
);
fulladder f6 (                                                                          //created an instance of fulladder module
.S(sum[6]),
.Cout(Cint[6]),
.A(A[6]),
.B(B[6]),
.Cin(Cint[5])
                                                                   //Cin is the previous adders carry
);
fulladder f7 (                                                                          //created an instance of fulladder module
.S(sum[7]),
.Cout(Cint[7]),
.A(A[7]),
.B(B[7]),
.Cin(Cint[6])
                                                                   //Cin is the previous adders carry
);
assign carry=Cint[7];
endmodule 


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