Half Subtractor Verilog Code | VLSI

Circuit of Half Subtractor:

Verilog Code:

module half_sub( A, B, D, Borrow);

input A,B;

output D, Borrow;

assign D = A^B;                                // Difference is the X-OR of input A and B

assign Borrow = ~A*B;                 // Borrow is the AND of inverted A and B

endmodule

See Also: Full Subtractor, 8 bit subtractor, Half Adder, Full Adder, 8 bit Adder